analog clock

1. Let's start an analog clock with a wheat background using this method.
   让我们通过该方法启动一个背景为白色的带指针时钟。
2. The ADC requires a1.8 V analog voltage supply and a differential clock for full performance operation.
   该ADC要求采用1.8V模拟电源供电及差分时钟信号，以便充分发挥其工作性能。
3. There are volume control and station knobs, AM/ FM options, an analog clock display and an alarm with snooze button.
   机器上面有音量控制和调频收音旋钮，AM/FM切换按钮，还有带止闹按钮的指针式闹钟。
4. World Clock plug-in – new analog clock faces and new digital clock design.
   世界时钟插件-新的模拟时钟的面孔和新的数字时钟设计。
5. The analog input is continuously sampled by an analog modulator at twice the clock frequency eliminating the need for external sample-and-hold circuitry.
   模拟输入由模拟调制器以时钟频率两倍的速度连续采样，因而无需外部采样保持电路。
6. Optical fiber analog communication system for transmitting high steady atomic clock signals
   传输高稳定原子钟信号的光纤模拟通信系统
7. But that's not all, it also supports text-to-speech and MS Agents to make your computer more fun and also features a fully graphical display with several options of digital and analog clock faces.
   但这还不是全部，它也支持文本到语音和MS代理，使您的计算机更有趣，同时拥有一个具有数字和模拟时钟面临多种选择全图形显示。
8. The performance of the analog circuit is difficult to satisfy the need, such as the analog pll can't satisfy the requirement of noise restrain in digital clock extracting circuit.
   模拟电路的性能难以满足需要，例如，在支路时钟恢复电路中，模拟锁相环难以满足噪声抑制要求；
9. The UWB signal acquisition circuit based on the analog PLL is improved. A method to obtain the signal clock is studied, and then on the base of this circuit a binary search algorithm is proposed to obtain the pulse position and the timing of the signal frame.
   改进了利用模拟锁相环捕获UWB信号的电路模型，研究了提取信号时钟的方法，并在此基础上提出了通过二分搜索得到脉冲位置和信号帧定时的算法。
10. Differing from previous sampling clock adjustment analog or mixed digital-analog circuits, this thesis suggests a fixed frequency clock sampling scheme, which can be implemented by all-digital circuits with simple structure, high integration.
    且不同于以往调整采样时钟的模拟或数模混合电路，本论文方案由固定频率时钟采样，整个方案可由全数字电路实现，结构简单，可集成度高，适合现代数字信号处理。
11. In time-division multiplex analog video signal system, the chrominance signal may be compressed along the time axis with the modulated clock pulse by the luminance signal so that the frequencies of time-compressed signal become homogeneous.
    在时分多路复用（TDM）的信号系统中，用调制的取样脉冲沿时间轴压缩色度信号的同时，可使色度信号的频率匀化，从而克服信号的时间压缩与频带扩展的矛盾。
12. It has many kinds of ways for analog input and the clock input, so it's possible to realize the electric circuit plan of multi-purpose data acquisition with the using of these characteristics.
    它具有多种模拟输入和时钟输入方式，利用这些特性可实现多功能的数据采集电路方案。
13. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter, rectifier, regulator, and AM demodulator.
    该RFID模拟前端包括本地振荡器、时钟产生电路、复位电路、匹配网络和反向散射电路、整流器、稳压器以及AM解调器等。
14. The paper introduces a simulated analog clock implemented by'HOUR ','MIN', and'SEC'indication lines on a circle.
    在一圆周上，用时、分、秒的显示指示实现仿模拟指针式的时钟。
15. The difference clock delay match technology adjusts the two channel AD analog clock phase and implements the two way AD uniformly-space sampling.
    差分时钟延迟匹配技术通过对两路AD的采样时钟进行相位调整，实现了两路AD的等间隔采样。
16. The LED Circular Analog Clock Display Com-posed of EPROM 27128
    用EPROM27128组成LED环形模拟量时钟线显示
17. According to different function, the hardware part is divided into processor module, analog signals input and converting module, digital signals module, communication module, clock module and display module.
    按照功能的不同，硬件划分成处理器系统模块、模拟信号输入和转换模块、开关量输入输出模块、通信模块、时钟模块、键盘显示模块、电源模块。
18. In this paper design of some circuit including in A/ D circuit is also analyzed, such as front analog circuit, sample clock circuit and data flip-latch circuit. Find out the fact reducing a high speed A/ D circuit performance.
    同时对高速转换器件及转换电路中包括前端模拟电路、采样时钟、后端数据锁存等辅助电路设计进行了分析。
19. Such as harmonic distorted in front analog circuit, sample clock shaking, analog power and the noise in ground plane etc. Some suggestion of circuit design is given to improve high-speed A/ D circuit performance.
    并在试验测试的基础上找出了影响高速模数转换电路转换性能的几个主要的因素：前端运放电路谐波失真、采样时钟抖动、模数电源及共地噪声串扰等。
20. This simulation platform is an instruction level emulator, using instruction queue to simulate the pipeline structure, and analog clock is adapted to simulate the clock cycle of performing an instruction.
    该仿真平台是一个指令级仿真器，采用指令队列来模拟流水线结构，并且添加了模拟时钟来模拟每个指令在执行过程中所用的时钟周期。
21. At gigabit transition rate, gigabit integrated circuits usually use analog circuits to perform gigabit rate functions such as clock generator and clock data recovery circuit.
    在高速串行接口集成电路的设计中，由于其高达千兆的传输频率，芯片中的一些设计如时钟生成和数据恢复电路大多采用模拟电路方式实现。
22. At present, digital equipment has been replaced to some extent the traditional analog instruments. Digital signal processing can not do without high-quality sampling clock.
    当前，数字化仪器已经在一定程度上取代了传统的模拟仪器，而数字信号处理离不开高精度的采样时钟。

noun

1. a clock that displays the time of day by the position of hands on a dial